View TDA6812-5_3502903.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

tda 6812-5 is a complete system for stereo tv-sound, controlled on an i 2 c bus. the device is made up of three functional blocks. 1. stereo processing with high quality (better than din 45500; suitable for nicam and cd for g-standard with i 2 c-controlled crosstalk compensation; selectable gain 0/6 db a) three stereo af-inputs b) random switching of all inputs to all outputs c) stereo scart-interface d) stereo loudspeaker signal section with volume precontrol, treble/bass control, enlargement of quasi-stereo/stereo sound base, separate l/r-volume control, equalizer interface after tone control e) stereo headphones signal section with ch1/ch2 and volume control 2. tv-identification-signal decoder a) active pilot-tone filter b) phase-independent rectifier with very narrow bandwidth for identification-signal decoding c) digital integrator for noise rejection d) multiplexer for cyclic scanning for stereo or dual-sound identification e) externally synchronized pll for reference-signal generation: synchronization with line sync pulse or 62.5-khz clock, integrated crystal oscillator and 4-mhz crystal, or with external 4-mhz timing signal type ordering code package tda 6812-5 q67000-a5127 p-dip-40-2 tv-stereo processor preliminary data bipolar ic tda 6812-5 p-dip-40-2 features l high quality stereo signal processing l high s/n ratio l i 2 c bus l clipping detector and clock generator l nicam or am sound inputs l volume control l universal audio interface for dolby, equalizer, surround sound features l multiplex 3-scart connections l independent headphones 113 06.94
tda 6812-5 semiconductor group 114 3. control a) i 2 c bus interface with listen/talk function b) control of entire audio processing c) reading of clipping detector d) control of identification-signal decoder e) reading of identification-signal decoder f) test modes pin functions pin no. function 1 af-input mono, left, sound 1 (adjustable) 2 bias af-operating point 3 af-input, right, sound 2 4 n.c. 5 54-khz input 6 54-khz filter 7 scart-input 1, left 8 scart-input 1, right 9 scart-input 2, left 10 scart-input 2, right 11 scart-input 3, left 12 scart-input 3, right 13 af-output scart (mono, sound 1, left) 14 af-output scart (mono, sound 2, right) 15 output port 1 (open collector) 16 output port 2 (open collector) 17 phase shifter quasi-stereo 18 phase shifter quasi-stereo 19 cut-off frequency bass (sound base), left 20 cut-off frequency bass (sound base), right 21 af-output, loudspeaker, right 22 af-output, loudspeaker, left 23 n.c. 24 af-input, volume control, right
semiconductor group 115 tda 6812-5 25 af-input, volume control, left 26 af-output, equalizer, right 27 af-output, equalizer, left 28 cut-off frequency treble, left 29 cut-off frequency treble, right 30 af-output, headphones, right 31 af-output, headphones, left 32 + v s (supply voltage) 33 i 2 c bus scl 34 i 2 c bus sda 35 input line sync pulse (4 x h-pulse), crystal oscillator 36 identification-signal decoder filter 37 n.c. 38 identification-signal decoder, filter 39 identification-signal decoder, pll-filter 40 ground pin functions (contd) pin no. function
tda 6812-5 semiconductor group 116 block diagram
semiconductor group 117 tda 6812-5 circuit description signal section the dematrixing and switching of multichannel tv-sound signals are performed in the matrix and switch section by the dual-carrier method. crosstalk compensation is on the sound 1 input. the compensation stage has a range of 3 db with a smallest increment of 0.2 db, and gain can also be switched between 0 and 6 db. in addition to the two inputs for the demodulated sound carriers, there are three dual-channel scart-inputs. the two matrix af-inputs can be bypassed internally so that decoded stereo signals of other systems (nicam) can also be processed. the switch section terminates in the scart-output and signal paths for the loudspeaker and headphones outputs. af-inputs can be randomly switched to af-outputs (8-6 matrix). in the loudpeaker signal path there is an inital volume control with a range of 0/C 15 db and an increment of 1.25 db. in conjunction with the main volume control that follows the tone control, very high overdriving immunity is ensured. the switchable quasi-stereo section that follows produces a stereo listening effect for mono signals through a 180 o c phase shift at mid-range frequencies (approx. 1 khz) in one channel. the following bass control has an increment of 3 db in its setting range of + 15/C 12 db. the cut-off frequency for each channel is set by an external capacitor. the circuit for enlarging the stereo sound base can be cut in for stereo signals to make the aural impression even more stereo-like by frequency-dependent antiphase crosstalk of 55 %. this works with the same cut-off frequency as the bass control, but the function is largely independent. the treble control, whose cut-off frequency is also set by an external capacitor, likewise has an increment of 3 db in a setting range of 12 db. the main value control with maximum gain of 10 db, which can be adjusted separately for l and r, terminates the loudspeaker signal path. 57 steps with an increment of 1.25 db mean a setting range of 71.25 db. functions like balance or loudness are implemented by software setting of the appropriate tone and volume controls. in the tone- control section there is a clipping detector that can be read on the i 2 c bus and enables automatic volume correction by the controller. after each reading the clipping bit is reset, which enables a renewed check for clipping with each i 2 c bus read operation. the headphones signal path includes a volume control with joint l/r-setting. 32 increments of 2 db produce a range of 62 db (31 x 2 db = 62 db). identification-signal decoder the input of the identification-signal decoder consists of an operational amplifier for selectivity of the pilot tone and its sidebands with an external lc-circuit. the signal is fed to a phase-independent active bandpass filter of very narrow bandwidth (externally adjustable) that detects the presence of the lower sideband of the pilot carrier modulated with the identification signal. the center frequency of the filter is switched back and forth between dual and stereo by a multiplexer (software-controlled timing). the multiplexer halts when a sideband is detected. this first "detected" criterion is freed from noise by a digital integrator followed by a comparator and can then be read on the i 2 c bus (talker) as stereo or dual mode. the m c controls the signal paths. all necesssary timing signals are derived from a fast settling pll synchronized by a reference frequency. this reference must be sufficiently identical to the horizontal frequency, but no phase locking is necessary . this means that it is possible to use the crystal-controlled frequency of 62.5 khz that is often found in pll-tuning systems. as further alternatives there is an integrated crystal oscillator that requires a 4-mhz crystal, or it is possible to use a clock frequency of 1 or 4 mhz.
tda 6812-5 semiconductor group 118 control section all functions are controlled by an i 2 c bus interface which can be both a listener and a talker. the currently valid data are stored in a latch block. the telegram structure is as follows: start condition - chip address - any number of bytes - stop condition the following conditions apply to the data bytes: before the actual data byte (with setting information) a subaddress byte must always be transmitted, which the i 2 c bus still interprets as a data byte. example: headphones (hp) volume is to be increased in several steps. different subaddresses can be used within a telegram, ie without a new start condition. but the change between listener and talker must always be made by stop condition - start condition - chip address. a start condition and a chip address (talk) must always be transmitted before reading. this loads the data that are to be read out on the i 2 c bus interface for transfer to the m c. r/w = 0 ? read (listen) r/w = 1 ? write (talk) right wrong start condition chip address 84 (hex) subaddress volume hp 03 (hex) volume step 8 08 (hex) subaddress volume hp 03 (hex) volume step 9 09 (hex) subaddress volume hp 03 (hex) volume step 10 0a (hex) stop condition start condition chip address 84 (hex) subaddress volume hp 03 (hex) volume step 8 08 (hex) volume step 9 09 (hex) volume step 10 0a (hex) stop condition chip address msb??????lsb 1 000010r/w
semiconductor group 119 tda 6812-5 setting bytes a) volume precontrol h = 0 identification-signal decoder synchronization with f h = 15.625 khz; power on h = 1 identification-signal decoder synchronization with 4 x f h (must be 1 for operation with crystal or 4-mhz reference frequency) q = 0 pll synchronization with line sync pulse; power on q = 1 pll synchronization with crystal oscillator (the bit for h must also be set to 1) b) l/r-loudspeaker volume subaddress bytes msb??????lsb volume precontrol volume left speaker volume right speaker volume headphones treble/bass switching byte i switching byte ii switching byte iii switching byte iv crosstalk compensation xxxx 0000 xxxx 0001 xxxx 0010 xxxx 0011 xxxx 0100 xxxx 0110 xxxx 0111 xxxx 1000 xxxx 1001 xxxx 0101 msb??????lsb maximum volume max. C 1 min. + 1 minimum volume power on xhq0000x xhq0001x xhq1011x xhq1100x 00000001 msb??????lsb maximum volume max. C 1 max. C 15 max. C 55 power on xx111111 xx111110 xx110000 xx001000 00000001
tda 6812-5 semiconductor group 120 c) headphones volume t0, t1 and t2 are test bits and must be set to 0 for normal operation. d) crosstalk compensation matrix (sound 1) e) treble / bass msb??????lsb maximum volume max. C 1 max. C 15 max. C 31 power on t2t1t011111 t2t1t011110 t2t1t010000 t2t1t00000x 00000001 msb??????lsb maximum gain max. C 1 gain 0 db minimum gain minimum gain power on xxx11111 xxx11110 xxx10000 xxx00001 xxx0000x xxx00001 msb??????lsb linear max. treble, lin. bass max. treble, lin. bass min. treble, lin. bass min. treble, lin. bass lin. treble, max. bass lin. treble, max. bass lin. treble, max. bass lin. treble, min. bass lin. treble, min. bass max. treble, max. bass min. treble, min. bass power on 10001000 11001000 11xx1000 01001000 00xx1000 10001101 100011x1 1000111x 10000100 100000xx 11xx11x1 00xx00xx 00000001 msb lsb msb lsb treble treble bass bass
semiconductor group 121 tda 6812-5 f) switching bytes i, ii, iii switching byte i scart-output switching byte ii headphones output switching byte iii loudspeaker output l0 thru l3 left output, r0 thru 3 right output. assignment r3 thru r0 is identical to l3 thru l0. msb??????lsb l3 0 l2 0 l1 0 l0 0 r3 0 r2 0 r1 0 r0 1 power on l3 l2 l1 l0 selected input 0000 mute 0001 af-input left, mono, sound 1 0010 af-input right, sound 2 0011 af-input left, dematrixed 0100 scart 1 left 0101 scart 1 right 0110 scart 2 left 0111 scart 2 right 1000 scart 3 left 1001 scart 3 right
tda 6812-5 semiconductor group 122 g) switching byte iv mxp-period = 2 s means that identification-signal decoder searches 1 s for dual and 1 s for stereo. it is basically permissible, for the given c 36,38 , to make the mpx period longer, but not shorter. qst = 0 quasi-stereo off; power on qst = 1 quasi-stereo on be = 0 stereo base enlargement off; power on be = 1 stereo base enlargement on mono = 0 identification-signal decoder set to stereo and held; power on mono = 1 normal operation of identification-signal decoder p1 = 0 port 1 (open collector) low (low-impedance); power on p1 = 1 port 1 high (high impedance) p2 = 0 port 2 (open collector) low (low-impedance); power on p2 = 1 port 2 high (high impedance) matrix = 0 gain matrix 0 db matrix = 1 gain matrix 6 db; power on h) talk mode cl = 1 loudspeaker signal path at clipping limit (cl is automatically reset after each reading operation) t3 thru t5 are test bits. msb??????lsb mpx0 mpx1 qst be mono p1 p2 matrix mpx0 mpx1 mpx-period recommended c 36,38 perm. xtal tolerances 0 0 2 s power-on 1 m f 20 ppm 0 1 4 s 2.2 m f 10 ppm 1 0 8 s 4.7 m f 5 ppm settings specially recommended for crystal operation 0 0 2 s 470 nf 40 ppm 0 1 4 s 330 nf 70 ppm msb??????lsb st d t3t4t5clx x 0 0 decoder detects mono 1 0 decoder detects stereo 0 1 decoder detects dual 1 1 suppressed internally
semiconductor group 123 tda 6812-5 absolute maximum ratings t a = 0 to 70 o c; all voltages relatives to v ss parameter symbol limit values unit remarks min. max. supply voltage v 21 014v max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage v 1 v 2 v 3 v 5 v 7 v 8 v 9 v 10 v 11 v 12 v 15 v 16 v 17 v 18 v 19 v 20 v 24 v 25 v 28 v 29 v 33 v 34 v 36 v 38 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v 32 v v v v v v v v v v v v v v v v v v v v v v v v max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current i 6 i 13 i 14 i 21 i 22 i 26 i 27 i 30 i 31 i 35 i 39 0 0 0 0 0 0 0 0 0 0 0 2 2 2 2 2 2 2 2 2 2 2 ma ma ma ma ma ma ma ma ma ma ma esd-voltage v esd C 2 2 kv hbm ( r = 1.5 k w , c = 100 pf)
tda 6812-5 semiconductor group 124 esd-voltage v esd7-14 C 6 6 kv hbm ( r = 1.5 k w , c = 100 pf) junction temperature t j 150 o c storage temperature t stg C 40 125 o c thermal resistance system ambient r th sa 38 k/w operating range supply voltage v 32 10 13.2 v ambient temperature t a 070 o c input frequency range f i 0.01 20 khz absolute maximum ratings (contd) t a = 0 to 70 o c; all voltages relatives to v ss parameter symbol limit values unit remarks min. max.
semiconductor group 125 tda 6812-5 characterstics v s = 12 v; t a = 25 o c; af-reference level 0 db = 250 mvrms unless otherwise defined; in accordance with test circuit 1. i 2 c bus preset: start - 84 - 01,3f - 02,3f - 00,00-03,1f - 04,88 - 05,10 - 06,12-07,12-08,12-09,00-stop chip address - vol lsl 63 - vol lsr 63 - vol pre 0 - vol hp 31 - tone lin - gain 0 db - switch byte i, ii, ii, iv the basic setting for each item in the specifications is always preset; the test conditions only state settings that differ. details in italics are for explanation of the hex codes, for switching bits only set bits or functions are given.5 parameter symbol limit values unit test condition min. typ. max. current consumption i 32 58 85 ma signal section max. gain max. gain max. gain max. gain max. gain max. gain v 22-1 v 21-3 v 27-1 v 26-3 v 31-1 v 30-3 C 2 C 2 C 2 C 2 C 2 C 2 0 0 0 0 0 0 2 2 2 2 2 2 db db db db db db gain gain v 13-1 v 14-3 C 2 C 2 0 0 2 2 db db max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain v 22-3 v 21-3 v 27-3 v 26-3 v 31-3 v 30-3 v 22-1 v 27-1 v 31-1 C 2 C 2 C 2 C 2 C 2 C 2 4 4 4 0 0 0 0 0 0 6 6 6 2 2 2 2 2 2 8 8 8 db db db db db db db db db 08,32; stereo; v 1 = 0 08,32; stereo; v 1 = 0 08,32; stereo; v 1 = 0 08,32; stereo; v 1 = 0 07,32; stereo; v 1 = 0 07,32; stereo; v 1 = 0 08,32; stereo; v 3 = 0 08,32; stereo; v 3 = 0 07,32; stereo; v 3 = 0 gain gain v 13-3 v 13-1 C 2 4 0 6 2 8 db db 06,32; stereo ; v 1 = 0 06,32; stereo ; v 3 = 0 max. gain max. gain max. gain max. gain max. gain max. gain v 22-1 v 21-3 v 27-1 v 26-3 v 31-1 v 30-3 4 4 4 4 4 4 6 6 6 6 6 6 8 8 8 8 8 8 db db db db db db 09,01; 6 db 09,01; 6 db 09,01; 6 db 09,01; 6 db 09,01; 6 db 09,01; 6 db
tda 6812-5 semiconductor group 126 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. gain gain v 13-3 v 14-3 4 4 6 6 8 8 db db 09,01; 6 db 09,01; 6 db max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain v 22-3 v 21-3 v 27-3 v 26-3 v 31-3 v 30-3 v 22-1 v 27-1 v 31-1 4 4 4 4 4 4 10 10 10 6 6 6 6 6 6 12 12 12 8 8 8 8 8 8 14 14 14 db db db db db db db db db 08,32-09,01; v 1 = 0 stereo; 6 db 08,32-09,01; v 1 = 0 stereo; 6 db 08,32-09,01; v 1 = 0 stereo; 6 db 08,32-09,01; v 1 = 0 stereo; 6 db 07,32-09,01; v 1 = 0 stereo; 6 db 07,32-09,01; v 1 = 0 stereo; 6 db 08,32-09,01; v 3 = 0 stereo; 6 db 08,32-09,01; v 3 = 0 stereo; 6 db 07,32-09,01; v 3 = 0 stereo; 6 db gain gain v 13-3 v 13-1 4 10 6 12 8 14 db db 06,32-09,01; v 1 = 0 stereo; 6 db 06,32-09,01; v 3 = 0 stereo; 6 db max. gain max. gain max. gain max. gain max. gain max. gain v 22-7 v 21-8 v 27-7 v 26-8 v 31-7 v 30-8 C 2 C 2 C 2 C 2 C 2 C 2 0 0 0 0 0 0 2 2 2 2 2 2 db db db db db db 08,45; scart 08,45; scart 08,45; scart 08,45; scart 07,45; scart 07,45; scart gain gain v 13-7 v 14-8 C 2 C 2 0 0 2 2 db db 06,45; scart 06,45; scart same values apply for pins 9 thru 12 min. gain main control min. gain main control min. gain precontrol min. gain precontrol v 22-1 v 21-3 v 22-1 v 21-3 C 17 C 17 C 70 C 70 C 15 C 15 C 65 C 65 C 13 C 13 db db db db 01,08-02,08 vol lsl 8-vol lsr 8 01,08-02,08 vol lsl 8-vol lsr 8 01,08-02,08 vol pre 24 01,08-02,08 vol pre 24
semiconductor group 127 tda 6812-5 same values apply for pins 7 thru 12 min. gain min. gain v 31-1 v 30-3 C 62 C 62 C 57 C 57 db db 03,01; vol hp 1 03,01; vol hp 1 same values apply for pins 7 thru 12 flutter and wow flutter and wow d v 21-22 d v 30-31 2 2 db db 01,3f-01,24 02,3f-02,24 vol lsl 63-36-vol lsr 63-36 03,1f-03,13 vol hp 31-19 increment vol 22 increment vol 21 increment vol 22 increment vol 21 increment vol 30 increment vol 31 d v 22 d v 21 d v 22 d v 21 d v 30 d v 31 0 0 0 0 0 0 1.25 1.25 1.25 1.25 2 2 2.5 2.5 2.5 2.5 4 4 db db db db db db 01,x-01, (x 1) vol lsl x-vol lsl (x 1) 01,x-01, (x 1) vol lsr x-vol lsr (x 1) 01,x-01, (x 1) vol pre x-vol pre (x 1) 01,x-01, (x 1) vol pre x-vol pre (x 1) 01,x-01, (x 1) vol hp x-vol hp (x 1) 03,x-03, (x 1) vol hp x-vol hp (x 1) matrix adjustment matrix adjustment matrix adjustment matrix adjustment matrix adjustment matrix adjustment v 22-1 v 31-1 v 13-1 v 22-1 v 31-1 v 13-1 2.5 2.5 2.5 C 3.5 C 3.5 C 3.5 3 3 3 C 3 C 3 C 3 3.5 3.5 3.5 C 2.5 C 2.5 C 2.5 db db db db db db 05,1f; gain max 05,1f; gain max 05,1f; gain max 05,01; gain max 05,01; gain max 05,01; gain max adj. increment adj. increment adj. increment d v 22 d v 31 d v 13 0.1 0.1 0.1 0.2 0.2 0.2 0.3 0.3 0.3 db db db 05,x-05, (x 1) gain x-gain (x 1) 05,x-05, (x 1) gain x-gain (x 1) 05,x-05, (x 1) gain x-gain (x 1) characteristics (contd) parameter symbol limit values unit test condition min. typ. max.
tda 6812-5 semiconductor group 128 bass boost bass boost bass cutoff bass cutoff v 31-1 v 21-3 v 31-1 v 21-3 13 13 15 15 C 12 C 12 db db db db 04,8f; f i = 40 hz bass max, treble lin 04,8f; f i = 40 hz bass max, treble lin 04,80; f i = 40 hz bass max, treble lin 04,80; f i = 40 hz bass max, treble lin increment bass increment bass d v 21 d v 22 1 1 3 3 5 5 db db 04,8x-04.8 (x 1) bass x-bass (x 1) 04,8x-04.8 (x 1) bass x-bass (x 1) treble boost treble boost v 22-1 v 21-3 10 10 12 12 db db 04,8f; f i = 15 khz treble max, bass lin 04,8f; f i = 15 khz treble max, bass lin treble cut-off treble cut-off v 22-1 v 21-3 C 12 C 12 db db 04,8f; f i = 15 khz treble max, bass lin 04,8f; f i = 15 khz treble max, bass lin increment treble increment treble d v 21 d v 22 1 1 3 3 5 5 db db 04,8x-04, (x 1) 8 treble x-treble (x 1) 04,8x-04, (x 1) 8 treble x-treble (x 1) sound linearity sound linearity d v 21 d v 22 2 2 db db 04,88; f i = 40 hz C 15 khz treble, bass lin 04,88; f i = 40 hz C 15 khz treble, bass lin response threshold of clipping detector v 1 580 mvrms 04,8f; f i = 40 hz treble lin, bass max 01,2f-02,2f vol lsl 47-vol lsr 47 same values apply for pins 3 and 7 thru 12 channel separation channel separation channel separation d v 21-22 d v 30-31 d v 13-14 50 50 50 db db db v 3 or v 1 = 600 mvrms v 3 or v 1 = 600 mvrms v 3 or v 1 = 600 mvrms characteristics (contd) parameter symbol limit values unit test condition min. typ. max.
semiconductor group 129 tda 6812-5 crosstalk attenuation a in/ow 60 db v iw = 0; v in1,3 = 600 mvrms; v in7-12 = 2 vrms muting muting muting muting muting muting a 1-22 a 3-21 a 1-27 a 3-26 a 1-31 a 3-30 80 80 80 80 80 80 db db db db db db 08,0x; v 1 = 600 mvrms mute l 08,0x; v 3 = 600 mvrms mute r 08,0x; v 1 = 600 mvrms mute l 08,0x; v 3 = 600 mvrms mute r 07,0x; v 1 = 600 mvrms mute l 07,0x; v 3 = 600 mvrms mute r muting muting a 3-14 a 1-13 80 80 db db 06,0x; v 3 = 600 mvrms mute r 06,0x; v 1 = 600 mvrms mute l same values apply for pins 7 thru 12; v 7-12 = 2 vrms max. input voltage max. input voltage max. input voltage max. input voltage max. input voltage max. input voltage v 3 * v 1 v 1 v 3 * v 1 v 1 600 600 300 300 300 150 mvrms mvrms mvrms mvrms mvrms mvrms v 21 1 % v 22 1 % v 22 1 %; stereo v 21 1 %; 09,01; 6 db v 22 1 %; 09,01; 6 db v 22 1 %; 09,01; 6 db; stereo * v in in mono mode without sc2 v 3 = 2 vrms and 1 vrms max. input voltage max. input voltage max. input voltage max. input voltage v 24 v 25 v 7 * v 8 * 3.4 3.4 2 2 vrms vrms vrms vrms v 21 1 % v 22 1 % v 22 3 % v 21 3 % * full tone control possible when 00,18; vol pre 24 same values apply for pins 9 thru 12 distortion factor distortion factor distortion factor distortion factor thd 30 thd 31 thd 30 thd 31 0.01 0.01 0.01 0.01 0.1 0.1 0.1 0.1 % % % % v 3 = 250 mvrms v 1 = 250 mvrms v 3 = 250 mvrms; 03,15 vol hp 21 v 3 = 250 mvrms vol hp 21 same values apply for pins 7 thru 12; v 7-12 = 600 mvrms characteristics (contd) parameter symbol limit values unit test condition min. typ. max.
tda 6812-5 semiconductor group 130 distortion factor distortion factor distortion factor distortion factor distortion factor distortion factor thd 22 thd 21 thd 22 thd 21 thd 22 thd 21 0.01 0.01 0.01 0.01 0.01 0.01 0.1 0.1 0.2 0.2 0.4 0.4 % % % % % % v 1 = 250 mvrms v 3 = 250 mvrms v 1 = 0.25 vrms 01,2f-02,2f vol lsl 47-vol lsr 47 v 3 = 0.25 vrms 01,2f-02,2f vol lsl 47-vol lsr 47 v 1 = 250 mvrms; 04.xx tone random v 3 = 250 mvrms; 04.xx tone random same values apply for pins 7 thru 12; v 7-12 = 600 mvrms distortion factor distortion factor thd 14 thd 13 0.01 0.01 0.1 0.1 % % v 3 = 250 mvrms v 1 = 250 mvrms same values apply for pins 7 thru 12; v 7-12 = 600 mvrms antiphase crosstalk sound base antiphase crosstalk sound base d v 22-21 d v 21-22 0.5 0.5 0.55 0.55 v 3 = 600 mvrms; f i = 2 khz; 09,10 base v 3 = 600 mvrms; f i = 2 khz; 09,10 base sound base phase sound base phase f 21-22 f 22-21 150 150 180 180 210 210 deg deg v 1 = 600 mvrms; 09,10 base ; f = 2 khz v 3 = 600 mvrms; 09,10 base ; f = 2 khz phase rotation quasi stereo f 22-21 f 22-21 f 22-21 0 130 C 30 10 180 10 40 230 0 deg deg deg v 3 ,1 = 600 mvrms; 09,20; qst ; f = 40 hz v 3 ,1 = 600 mvrms; 09,20; qst ; f = 700 hz v 3 ,1 = 600 mvrms; 09,20; qst ; f = 15 khz characteristics (contd) parameter symbol limit values unit test condition min. typ. max.
semiconductor group 131 tda 6812-5 unweighted snr unweighted snr unweighted snr unweighted snr a s/n22 a s/n21 a s/n22 a s/n21 90 90 70 70 97 97 80 80 db db db db v nrms 20 hz-20 khz ; v 1 = 0.6 vrms v nrms 20 hz-20 khz ; v 1 = 0.6 vrms v nrms 20 hz-20 khz ; v 1 = 0.6 vrms 01,27-02,27 vol lsl 39-vol lsr 39 v nrms 20 hz-20 khz ; v 1 = 0.6 vrms 01,27-02,27 vol lsl 39-vol lsr 39 noise voltage noise voltage v n22 v n21 2 2 10 10 m vrms m vrms v nrms 20 hz-20 khz ; 01,00-02,00 vol lsl 0-vol lsr 0 v nrms 20 hz-20 khz ; 01,00-02,00 vol lsl 0-vol lsr 0 unweighted snr unweighted snr unweighted snr unweighted snr a s/n31 a s/n30 a s/n31 a s/n30 90 90 70 70 97 97 80 80 db db db db v nrms 20 hz-20 khz ; v 1 = 0.6 vrms v nrms 20 hz-20 khz ; v 3 = 0.6 vrms v nrms 20 hz-20 khz ; v 1 = 0.6 vrms 03,10; vol hp 16 v nrms 20 hz-20 khz ; v 3 = 0.6 vrms 03,10; vol hp 16 noise voltage noise voltage v n31 v n30 2 2 10 10 m vrms m vrms v nrms 20 hz-20 khz ; 03,00; vol hp 0 v nrms 20 hz-20 khz ; 03,00; vol hp 0 unweighted snr unweighted snr a s/n13 a s/n14 90 90 97 97 db db v nrms 20 hz-20 khz ; v 1 = 0.6 vrms v nrms 20 hz-20 khz ; v 3 = 0.6 vrms characteristics (contd) parameter symbol limit values unit test condition min. typ. max.
tda 6812-5 semiconductor group 132 dc transition d 1 bit dc transition d 1 bit dc transition d 1 bit dc transition d 1 bit dc transition d 1 bit dc transition d 1 bit dc transition d 1 bit dc transition d 1 bit d v 22 d v 21 d v 22 d v 21 d v 22 d v 21 d v 30 d v 31 10 10 10 10 10 10 10 10 mv mv mv mv mv mv mv mv 01,x-01,x 1 vol lsl x-vol lsl (x 1) 02,x-02, x 1 vol lsr x-vol lsr (x 1) 00,x-04, x 1 vol pre x-vol pre (x 1) 00,x-04, x 1 vol pre x-vol pre (x 1) 04,x-05, x 1 tone x-tone (x 1) 04,x-05, x 1 tone x-tone (x 1) 03,x-03, x 1 vol hp x-vol hp (x 1) 03,x-03, x 1 vol hp x-vol hp (x 1) design-related data input resistance input resistance input resistance input resistance input resistance input resistance input resistance input resistance r 1 r 3 r 7 r 8 r 9 r 10 r 11 r 12 22 22 25 25 25 25 25 25 k w k w k w k w k w k w k w k w output resistance output resistance output resistance output resistance output resistance output resistance output resistance output resistance r 13 r 14 r 21 r 22 r 26 r 27 r 30 r 31 60 60 60 60 200 200 200 200 w w w w w w w w characteristics (contd) parameter symbol limit values unit test condition min. typ. max.
semiconductor group 133 tda 6812-5 characteristics (contd) parameter symbol limit values unit test condition test circuit min. typ. max. identification-signal decoder gain filter op-amp v 6 13 14 15 db v if = 80 mvpp 1 max. input voltage v 6 600 mvpp function 2 vco voltage pll vco voltage pll vco voltage pll vco voltage pll vco voltage pll vco voltage pll v 39 v 39 v 39 v 39 v 39 v 39 1.3 2 1.3 2 3 3 4 4.7 4.7 4 v v v v v v f 35 = 14.6 khz; v 35 = 2.5 v f 35 = 15.625 khz; v 35 = 2.5 v f 35 = 16.6 khz; v 35 = 2.5 v f 35 = 58.4 khz; v 35 = 2.5 v 00,40, line sync f 35 = 66.4 khz; v 35 = 2.5 v 00,40, line sync 00,40, line sync; xtal 2 2 2 2 2 4 v 36 or v 38 when v 6 = 0 v 36 * or v 38 * when v 6 = 100 mvpp; m = 50 % gain identification- signal filter gain identification- signal filter v isf v isf 3.4 3.4 6.8 6.8 db db f 6 = pilot signal: dual i 2 c-talk: dual f 6 = pilot signal: stereo ; i 2 c-talk: stereo v 36 test = v 36 ( v 5 = 0) d v 36 ; v 38 test = v 38 ( v 6 = 0) d v 38 detection threshold detection threshold detection threshold detection threshold d v 36 C d v 36 d v 38 C d v 38 900 900 900 900 mv mv mv mv i 2 c-talk: stereo or dual i 2 c-talk: stereo or dual i 2 c-talk: stereo or dual i 2 c-talk: stereo or dual 3 3 3 3 v id filter v 36 v 36 * C ? 2 v 38 v 38 * C ? 2 + v 6 --------------------------------------------------------------------------------- =
tda 6812-5 semiconductor group 134 mono threshold mono threshold mono threshold mono threshold d v 36 C d v 36 d v 38 C d v 38 0 0 0 0 100 100 100 100 mv mv mv mv i 2 c-talk: mono i 2 c-talk: mono i 2 c-talk: mono i 2 c-talk: mono 3 3 3 3 detection response detection response t det t det 0.25 0.25 0.5 0.5 t mpx t mpx i 2 c-talk: stereo or dual; d v 36 = 1 v i 2 c-talk: stereo or dual; d v 38 = 1 v 3 3 switching threshold f ref -input switching threshold f ref -input v h-il v h-ih 0 3.5 1.5 v 21 v v 2 2 amplitude crystal oscillator v 35 * 2 vpp to = 4.00000 mhz series rsonance 4 external 1-mhz or 4- mhz clock v 35 0.3 vpp 3 multiplexer clock multiplexer clock multiplexer clock multiplexer clock t mpx t mpx t mpx t mpx 1.08 2.17 4.34 8.68 s s s s 09,c8, mpx = 1 s 09,08, mpx = 2 s 09,48, mpx = 4 s 09,88, mpx = 8 s design-related data filter output resistance r 36,38 110 k w f ref input resistance r 35 800 w input impedance crystal oscillator z 35 C 600 C 500 C 400 w crystal oscillator series resistance r q1 100 w p tot qu =1 m w; 4 mhz crystal oscillator series resistance r q3 300 w p tot qu =1 m w; 12 mhz 20 db p tot qu =1 m w; f <15 mhz i 2 c bus (scl, sda) edges scl, sda rise time fall time t r t f 1 300 m s ns characteristics (contd) parameter symbol limit values unit test condition test circuit min. typ. max.
semiconductor group 135 tda 6812-5 shift register clock scl frequency h-pulse width l-pulse width f scl t h t l 0 4 4 100 khz m s m s start setup time hold time t susta t hdsta 4 4 m s m s stop setup time bus free t susto t buf 4 4 m s m s data change setup time hold time t sudat t hddat 1 600 m s ns input scl, sda input voltage input current v ih v il i ih i il 2.4 5.5 1 50 100 v v m a m a output sda (open collector) output voltage output voltage port 1 output voltage port 1 v qh v ql v 15h v 15l v 15h v 15l 5.4 v s v s 0.4 0.4 0.4 v v v v v v r l = 2.5 k w i ql = 3 ma r l = 2.5 k w ; 09,04 i ql = 3 ma; 09,00 r l = 2.5 k w ; 02,02 i ql = 3 ma; 09,00 2 2 2 2 characteristics (contd) parameter symbol limit values unit test condition test circuit min. typ. max.
tda 6812-5 semiconductor group 136 test circuit 1
semiconductor group 137 tda 6812-5 test circuit 2
tda 6812-5 semiconductor group 138 test circuit 3
semiconductor group 139 tda 6812-5 test circuit 4
tda 6812-5 semiconductor group 140 application circuit 1
semiconductor group 141 tda 6812-5 application circuit 2
tda 6812-5 semiconductor group 142 tv-soundconcept with dolby-surround-option
semiconductor group 143 tda 6812-5
tda 6812-5 semiconductor group 144 i 2 c bus timing diagram t susta setup time (start) t hdsta hold time (start) t h h-pulse width (clock) t l l-pulse width (clock) t sudat setup time (data change) t hddat hold time (data change) t susto setup time (stop) t buf bus free time t f fall time t r rise time all times referred to v ih and v il values.

▲Up To Search▲

Price & Availability of TDA6812-5

	To Download TDA6812-5 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .